Altera SoC FPGA

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Description Datasheet Availability Pricing (DKK) Filter the results in the table by unit price based on your quantity.
Qty. RoHS Mounting Style
Package/Case
Core
Number of Cores
Maximum Clock Frequency
L1 Cache Instruction Memory
L1 Cache Data Memory
Data RAM Size
Number of Logic Elements
Adaptive Logic Modules - ALMs
Embedded Memory
Number of I/Os
Operating Supply Voltage
Minimum Operating Temperature
Maximum Operating Temperature
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 39 Weeks
Min.: 84
Mult.: 84

SMD/SMT 900 MHz 756 mV to 803 mV - 40 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 53 Weeks
Min.: 160
Mult.: 160

SMD/SMT 900 MHz 727.5 mV to 803 mV 0 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 53 Weeks
Min.: 160
Mult.: 160

SMD/SMT 900 MHz 727.5 mV to 803 mV 0 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 53 Weeks
Min.: 160
Mult.: 160

SMD/SMT 900 MHz 727.5 mV to 803 mV - 40 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 53 Weeks
Min.: 160
Mult.: 160

SMD/SMT 900 MHz 727.5 mV to 803 mV - 40 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 39 Weeks
Min.: 84
Mult.: 84

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 39 Weeks
Min.: 84
Mult.: 84

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 39 Weeks
Min.: 84
Mult.: 84

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 39 Weeks
Min.: 84
Mult.: 84

SMD/SMT 900 MHz 756 mV to 803 mV 0 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 39 Weeks
Min.: 84
Mult.: 84

SMD/SMT 900 MHz 756 mV to 803 mV 0 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 39 Weeks
Min.: 84
Mult.: 84

SMD/SMT 900 MHz 756 mV to 803 mV - 40 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 39 Weeks
Min.: 84
Mult.: 84

SMD/SMT 900 MHz 756 mV to 803 mV - 40 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 53 Weeks
Min.: 160
Mult.: 160

SMD/SMT 900 MHz 727.5 mV to 803 mV 0 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 53 Weeks
Min.: 160
Mult.: 160

SMD/SMT 900 MHz 727.5 mV to 803 mV 0 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 53 Weeks
Min.: 160
Mult.: 160

SMD/SMT 900 MHz 727.5 mV to 803 mV - 40 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 53 Weeks
Min.: 160
Mult.: 160

SMD/SMT 900 MHz 727.5 mV to 803 mV - 40 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 39 Weeks
Min.: 84
Mult.: 84

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 39 Weeks
Min.: 84
Mult.: 84

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 39 Weeks
Min.: 84
Mult.: 84

SMD/SMT 900 MHz 756 mV to 803 mV 0 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 39 Weeks
Min.: 84
Mult.: 84

SMD/SMT 900 MHz 756 mV to 803 mV 0 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 39 Weeks
Min.: 1
Mult.: 1

SMD/SMT 900 MHz 756 mV to 803 mV - 40 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 39 Weeks
Min.: 84
Mult.: 84

SMD/SMT 900 MHz 756 mV to 803 mV - 40 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 53 Weeks
Min.: 160
Mult.: 160

SMD/SMT 900 MHz 727.5 mV to 803 mV 0 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 53 Weeks
Min.: 160
Mult.: 160

SMD/SMT 900 MHz 727.5 mV to 803 mV 0 C + 100 C
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 53 Weeks
Min.: 160
Mult.: 160

SMD/SMT 900 MHz 727.5 mV to 803 mV - 40 C + 100 C