SN74LV8T164MPWREP

Texas Instruments
595-74LV8T164MPWREP
SN74LV8T164MPWREP

Mfr.:

Description:
Counter Shift Registers

Lifecycle:
New Product:
New from this manufacturer.
Datasheet:
ECAD Model:
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In Stock: 2.620

Stock:
2.620 Can Dispatch Immediately
Factory Lead Time:
12 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
-,-- kr.
Ext. Price:
-,-- kr.
Est. Tariff:
Packaging:
Full Reel (Order in multiples of 3000)

Pricing (DKK)

Qty. Unit Price
Ext. Price
Cut Tape / MouseReel™ †
23,35 kr. 23,35 kr.
15,82 kr. 158,20 kr.
14,62 kr. 365,50 kr.
12,68 kr. 1.268,00 kr.
11,94 kr. 2.985,00 kr.
10,44 kr. 5.220,00 kr.
8,65 kr. 8.650,00 kr.
Full Reel (Order in multiples of 3000)
8,06 kr. 24.180,00 kr.
† A MouseReel™ fee of 47,00 kr. will be added and calculated in your basket. All MouseReel™ orders are non-cancellable and non-returnable. ↩

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Counter Shift Registers
RoHS:  
Shift Registers
Parallel to Serial
8 Circuit
8 bit
TSSOP-14
CMOS
4 Input
40.1 ns
1.8 V
5.5 V
- 55 C
+ 125 C
Reel
Cut Tape
MouseReel
Brand: Texas Instruments
High Level Output Current: - 24 mA
Input Type: Serial
Low Level Output Current: 24 mA
Mounting Style: SMD/SMT
Number of Output Lines: 9 Output
Operating Supply Voltage: 1.8 V to 5.5 V
Product: Serial Shift Registers
Product Type: Counter Shift Registers
Factory Pack Quantity: 3000
Subcategory: Logic ICs
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Attributes selected: 0

Datasheet

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TARIC:
8542319000
USHTS:
8542390090
MXHTS:
8542399999
ECCN:
EAR99

SN74LV8T164/SN74LV8T164-Q1 Shift Register

Texas Instruments SN74LV8T164/SN74LV8T164-Q1 Parallel-Load Shift Register contains an 8-bit shift register with asynchronous clear (CLR) input and AND-gated serial inputs. The gated serial (A and B) inputs permit complete control over incoming data. A low at either input inhibits new data entry and resets the first flip-flop to the low level at the next clock (CLK) pulse. A high-level input enables the other input, determining the first flip-flop's state. The data at the serial inputs can be changed while CLK is low or high, provided the minimum set-up time requirements are met. Clocking occurs on the low-to-high-level transition of CLK.

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