Si538 JESD204B Clock Generators

Skyworks Solutions Inc. Si538 JESD204B Clock Generators are high-performance, integer-based (M/N) clock generators optimized for small cell wireless applications. These demand the highest level of integration and phase noise performance. These devices are based on 4th generation DSPLL technology. The Skyworks Si538 Clock Generators combine frequency synthesis and jitter attenuation in a highly integrated digital solution that eliminates the need for external VCXO and loop filter components. These devices include a low cost, a fixed-frequency crystal that provides frequency stability for free-run and holdover modes.

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Description Datasheet Availability Pricing (DKK) Filter the results in the table by unit price based on your quantity.
Qty. RoHS ECAD Model Number of Outputs
Max Output Freq
Output Level
Input Level
Package/Case
Maximum Input Frequency
Supply Voltage - Min
Supply Voltage - Max
Minimum Operating Temperature
Maximum Operating Temperature
Series
Mounting Style
Packaging
Skyworks Solutions, Inc. Clock Synthesizer/Jitter Cleaner Ultra-low phase noise, dual-PLL wireless jitter attenuating clock multiplier
Datasheet
257In Stock
Min.: 1
Mult.: 1

Si538x Tray
Skyworks Solutions, Inc. Clock Synthesizer/Jitter Cleaner Ultra-low phase noise, wireless jitter attenuating clock multiplier
Datasheet
213In Stock
Min.: 1
Mult.: 1

Si538x Tray
Skyworks Solutions, Inc. Clock Synthesizer/Jitter Cleaner Ultra-low phase noise, multi-PLL wireless jitter attenuating clock multiplier
Datasheet
220Expected 22/06/2026
Min.: 1
Mult.: 1

12 Output 2.94912 GHz CML, HCSL, LVCMOS, LVDS, LVPECL LVCMOS QFN-64 750 MHz 1.71 V 1.89 V - 40 C + 85 C Si538x SMD/SMT Tray
Skyworks Solutions, Inc. Clock Synthesizer/Jitter Cleaner Ultra-low phase noise, dual-PLL wireless jitter attenuating clock multiplier
Datasheet
Non-Stocked Lead-Time 8 Weeks
Min.: 1
Mult.: 1

12 Output 2.94912 GHz CML, HCSL, LVCMOS, LVDS, LVPECL LVCMOS QFN-64 750 MHz 1.71 V 1.89 V - 40 C + 85 C Si538x SMD/SMT Tray
Skyworks Solutions, Inc. Clock Synthesizer/Jitter Cleaner Ultra-low phase noise, dual-PLL wireless jitter attenuating clock multiplier
Datasheet
Non-Stocked Lead-Time 8 Weeks
Min.: 1.000
Mult.: 1.000
: 1.000

12 Output 2.94912 GHz CML, HCSL, LVCMOS, LVDS, LVPECL Differential, LVCMOS QFN-64 750 MHz 1.71 V 1.89 V - 40 C + 85 C Si538x SMD/SMT Reel
Skyworks Solutions, Inc. Clock Synthesizer/Jitter Cleaner Ultra-Low Phase Noise, JESD204B Compliant, Jitter Attenuating Clock Multiplier
Datasheet
Non-Stocked Lead-Time 8 Weeks
Min.: 260
Mult.: 260

12 Output 2.94912 GHz CML, HCSL, LVCMOS, LVDS, LVPECL LVCMOS QFN-64 750 MHz 1.71 V 1.89 V - 40 C + 85 C Si538x SMD/SMT Tray
Skyworks Solutions, Inc. Clock Synthesizer/Jitter Cleaner Ultra-Low Phase Noise, JESD204B Compliant, Jitter Attenuating Clock Multiplier
Datasheet
Non-Stocked Lead-Time 8 Weeks
Min.: 1.000
Mult.: 1.000
: 1.000

12 Output 2.94912 GHz CML, HCSL, LVCMOS, LVDS, LVPECL Differential, LVCMOS QFN-64 750 MHz 1.71 V 1.89 V - 40 C + 85 C Si538x SMD/SMT Reel
Skyworks Solutions, Inc. Clock Synthesizer/Jitter Cleaner Ultra-low phase noise, multi-PLL wireless jitter attenuating clock multiplier
Datasheet
Non-Stocked Lead-Time 8 Weeks
Min.: 260
Mult.: 260

Si538x Tray
Skyworks Solutions, Inc. Clock Synthesizer/Jitter Cleaner Ultra-low phase noise, multi-PLL wireless jitter attenuating clock multiplier
Datasheet
Non-Stocked Lead-Time 8 Weeks
Min.: 1.000
Mult.: 1.000
: 1.000

Si538x Reel
Skyworks Solutions, Inc. Clock Synthesizer/Jitter Cleaner Ultra-low phase noise, multi-PLL wireless jitter attenuating clock multiplier
Datasheet
Non-Stocked Lead-Time 8 Weeks
Min.: 1.000
Mult.: 1.000
: 1.000

12 Output 2.94912 GHz CML, HCSL, LVCMOS, LVDS, LVPECL Differential, LVCMOS QFN-64 750 MHz 1.71 V 1.89 V - 40 C + 85 C Si538x SMD/SMT Reel
Skyworks Solutions, Inc. Clock Synthesizer/Jitter Cleaner Ultra-low phase noise, wireless jitter attenuating clock multiplier
Datasheet
Non-Stocked Lead-Time 8 Weeks
Min.: 1.000
Mult.: 1.000
: 1.000

Si538x Reel
Skyworks Solutions, Inc. Clock Synthesizer/Jitter Cleaner Ultra-low phase noise, dual-PLL wireless jitter attenuating clock multiplier
Datasheet
Non-Stocked Lead-Time 8 Weeks
Min.: 1.000
Mult.: 1.000
: 1.000

Si538x Reel