Agilex™ 5 FPGAs & SoCs

Altera Agilex™ 5 FPGAs and SoCs serve a broad range of applications that require high performance, lower power, smaller form factors, and lower logic densities. The Agilex 5 devices feature enhanced DSP with an AI tensor block that delivers high-efficiency Artificial Intelligence (AI) and Digital Signal Processing (DSP) functionality. An asymmetric applications processor system, consisting of dual Arm® Cortex-A76 cores and dual Cortex-A55 cores, enables performance and power efficiency optimization of workloads.

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Description Datasheet Availability Pricing (DKK) Filter the results in the table by unit price based on your quantity.
Qty. RoHS Mounting Style
Package/Case
Core
Number of Cores
Maximum Clock Frequency
L1 Cache Instruction Memory
L1 Cache Data Memory
Data RAM Size
Number of Logic Elements
Number of I/Os
Operating Supply Voltage
Minimum Operating Temperature
Maximum Operating Temperature
Altera SoC FPGA Agilex 5 E Series
Datasheet
21In Stock
Min.: 1
Mult.: 1

Altera SoC FPGA Agilex 5 E Series
Datasheet
23In Stock
Min.: 1
Mult.: 1

Altera SoC FPGA Agilex 5 E Series
Datasheet
25In Stock
Min.: 1
Mult.: 1

Altera SoC FPGA Agilex 5 E Series
Datasheet
30In Stock
Min.: 1
Mult.: 1

Altera SoC FPGA Agilex 5 FPGA - Engineering Sample
Datasheet
Product Comments
4In Stock
Min.: 1
Mult.: 1

SMD/SMT VPBGA-1591 ARM Cortex A55, ARM Cortex A76 2 Core 1.5 GHz, 1.8 GHz 32 kB, 64 kB 32 kB, 64 kB 512 kB 656000 LE 500 I/O 1 V to 3.3 V 0 C + 100 C
Altera SoC FPGA Agilex 5 E Series
Datasheet
30In Stock
Min.: 1
Mult.: 1

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 1
Mult.: 1

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 1
Mult.: 1

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 1
Mult.: 1

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 1
Mult.: 1

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 60
Mult.: 60

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 60
Mult.: 60

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 60
Mult.: 60

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 60
Mult.: 60

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 60
Mult.: 60

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 60
Mult.: 60

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 60
Mult.: 60

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 1
Mult.: 1
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 60
Mult.: 60

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 1
Mult.: 1
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 1
Mult.: 1
Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 60
Mult.: 60

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 60
Mult.: 60

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 60
Mult.: 60

Altera SoC FPGA
Datasheet
Non-Stocked Lead-Time 16 Weeks
Min.: 60
Mult.: 60