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CD74ACT164E

Name: Texas Instruments CD74ACT164E
Brand: Texas Instruments
SKU: 595-CD74ACT164E
Price: 11.26 DKK
Availability: OutOfStock

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Mouser No:

595-CD74ACT164E

Mfr. No:

CD74ACT164E

Mfr.:

Texas Instruments

Description:

Counter Shift Registers 8-Bit Srl-In Prl-Out

Datasheet:

CD74ACT164E Datasheet

ECAD Model:

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More Information

Learn more about Texas Instruments CD74ACT164E

Availability

Stock:: Non-Stocked

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Factory Lead Time:: 12 Weeks Estimated factory production time.

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Pricing (DKK)

Qty.	Unit Price	Ext. Price
	11,26 kr.	11,26 kr.
	8,28 kr.	82,80 kr.
	7,53 kr.	188,25 kr.
	6,67 kr.	667,00 kr.
	6,30 kr.	1.575,00 kr.
	6,26 kr.	3.130,00 kr.
	5,86 kr.	5.860,00 kr.
	5,66 kr.	14.150,00 kr.
	5,54 kr.	27.700,00 kr.

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	Texas Instruments
Product Category:	Counter Shift Registers
RoHS:
Counting Sequence:	Serial to Parallel
Number of Circuits:	1 Circuit
Number of Bits:	8 bit
Package/Case:	PDIP-14
Logic Family:	74ACT
Logic Type:	CMOS
Number of Input Lines:	2
Propagation Delay Time:	14.9 ns
Supply Voltage - Min:	500 mV
Supply Voltage - Max:	6 V
Minimum Operating Temperature:	- 55 C
Maximum Operating Temperature:	+ 125 C
Packaging:	Tube
Brand:	Texas Instruments
Function:	8 Bit Serial In Parallel Out
Mounting Style:	SMD/SMT
Number of Output Lines:	8
Operating Supply Voltage:	500 mV to 6 V
Product Type:	Counter Shift Registers
Series:	CD74ACT164
Factory Pack Quantity:	25
Subcategory:	Logic ICs
Unit Weight:	1 g

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Compliance Codes

TARIC:: 8542319000
CNHTS:: 8542399000
CAHTS:: 8542390000
USHTS:: 8542390090
JPHTS:: 8542390990
MXHTS:: 8542310399
ECCN:: EAR99

Origin Classifications

Country of Origin:: Malaysia
Assembly Country of Origin:: Not available
Country of Diffusion:: Not available

The country is subject to change at the time of shipment.

CD74AC164/CD74ACT164 8-Bit SIPO Shift Registers

Texas Instruments CD74AC164/CD74ACT164 8-Bit SIPO Shift Registers have two serial inputs (A and B) connected through an AND gate and an asynchronous clear (CLR). The device requires a high signal on both A and B to set the input data line high; a low signal on either will set the input data line low. Data at A and B can be changed while CLK is high or low, provided the minimum set-up time requirements are met.