STM32G491RET6

STMicroelectronics
511-STM32G491RET6
STM32G491RET6

Mfr.:

Description:
ARM Microcontrollers - MCU Mainstream Arm Cortex-M4+ MCU 170MHz with 512Kbytes of Flash memory
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Datasheet:
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Availability

Stock:
0

You can still purchase this product for backorder.

On Order:
1.904
Expected 14/05/2026
1.920
Expected 16/07/2026
Factory Lead Time:
12
Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
-,-- kr.
Ext. Price:
-,-- kr.
Est. Tariff:

Pricing (DKK)

Qty. Unit Price
Ext. Price
47,59 kr. 47,59 kr.
36,85 kr. 368,50 kr.
34,17 kr. 854,25 kr.
30,36 kr. 3.036,00 kr.
29,39 kr. 7.347,50 kr.
28,65 kr. 14.325,00 kr.
27,98 kr. 26.860,80 kr.
27,68 kr. 79.718,40 kr.
5.760 Quote

Product Attribute Attribute Value Select Attribute
STMicroelectronics
Product Category: ARM Microcontrollers - MCU
RoHS:  
STM32G4
SMD/SMT
LQFP-64
ARM Cortex M4
512 kB
32 bit
4 x 12 bit
170 MHz
52 I/O
112 kB
1.71 V
3.6 V
- 40 C
+ 85 C
Tray
Brand: STMicroelectronics
Country of Assembly: Not Available
Country of Diffusion: Not Available
Country of Origin: TW
DAC Resolution: 12 bit
Interface Type: I2C, SPI, UART, USB
Moisture Sensitive: Yes
Product: MCUs
Product Type: ARM Microcontrollers - MCU
Program Memory Type: Flash
Factory Pack Quantity: 960
Subcategory: Microcontrollers - MCU
Tradename: STM32
Unit Weight: 350 mg
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Attributes selected: 0

Datasheet

PCN

TARIC:
8542319000
CNHTS:
8542319092
CAHTS:
8542310000
USHTS:
8542310025
ECCN:
3A991.a.2

STM32G4 Mixed-Signal Microcontrollers (MCUs)

STMicroelectronics STM32G4 Mixed-Signal Microcontrollers (MCUs) combines a 32-bit Arm® Cortex®-M4 core (with FPU and DSP instructions) running at 170MHz. This is also combined with 3 different hardware accelerators: ART Accelerator™, CCM-SRAM routine booster, and mathematical accelerators. A flexible interconnect matrix allows autonomous communication between peripherals and saves CPU resources and power consumption. A high degree of compatibility with the STM32F3 Series guarantees outstanding efficiency when designing derivatives of applications at different performance levels.

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