25CS320T-I/Q4B

Microchip Technology
579-25CS320T-I/Q4B
25CS320T-I/Q4B

Mfr.:

Description:
EEPROM 32 Kbit SPI SERIAL EEPROM w/ECC, 8-UDFN T&R, 85C Industrial

Lifecycle:
New Product:
New from this manufacturer.
Datasheet:
ECAD Model:
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More Information
Learn more about Microchip Technology 25CS320T-I/Q4B

In Stock: 5.000

Stock:
5.000 Can Dispatch Immediately
Factory Lead Time:
6 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
-,-- kr.
Ext. Price:
-,-- kr.
Est. Tariff:
Packaging:
Full Reel (Order in multiples of 5000)

Pricing (DKK)

Qty. Unit Price
Ext. Price
Cut Tape / MouseReel™ †
3,33 kr. 3,33 kr.
3,27 kr. 32,70 kr.
3,14 kr. 78,50 kr.
3,05 kr. 305,00 kr.
Full Reel (Order in multiples of 5000)
3,05 kr. 15.250,00 kr.
† A MouseReel™ fee of 47,00 kr. will be added and calculated in your basket. All MouseReel™ orders are non-cancellable and non-returnable. ↩

Product Attribute Attribute Value Select Attribute
Microchip
Product Category: EEPROM
RoHS:  
32 kbit
SPI
20 MHz
4 k x 8
UDFN-8
20 ns
1.7 V
5.5 V
SMD/SMT
200 Year
- 40 C
+ 85 C
Reel
Cut Tape
MouseReel
Active Read Current - Max: 5 mA
Brand: Microchip Technology
Country of Assembly: Not Available
Country of Diffusion: Not Available
Country of Origin: TH
Operating Supply Current: 10 uA
Product Type: EEPROM
Factory Pack Quantity: 5000
Subcategory: Memory & Data Storage
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Attributes selected: 0

Datasheet

PCN

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TARIC:
8542327500
USHTS:
8542320051
ECCN:
EAR99

25CS320 32-Kbit SPI Serial EEPROM

Microchip Technology 25CS320 32-Kbit SPI Serial EEPROM uses an SPI-compatible bus organized into 4096 bytes of 8-bits each (4KB). Microchip Technology 25CS320 is designed for consumer, industrial, and automotive applications and offers reliable, nonvolatile memory storage with a wide operating voltage range of 1.7V to 5.5V. The device requires a clock input (SCK), data input (SI), and data output (SO) lines, with access controlled via a Chip Select (CS) input. It also features a pause function, allowing the host to handle higher-priority tasks while ignoring input transitions, except for Chip Select.

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